ScoutQuest7 Oct 2026
IZMO532341New partnership deal

IIT Madras and semiconductor arm enter Phase II of ₹99.94 crore MeitY-sanctioned silicon photonics program

izmo Microsystems, an IZMO Ltd subsidiary, signs an MoU with IIT Madras for Phase II of the MeitY-sanctioned CPPICS program — ₹99.94 crore over five years (MeitY ₹97.54 crore, izmo ₹2.40 crore).

Total project outlay
₹99.94 crore over five years
MeitY contribution
₹97.54 crore
izmo Microsystems commitment
₹2.40 crore cash and in-kind

What was announced izmo Limited's semiconductor subsidiary, izmo Microsystems Pvt. Ltd., has entered into a Memorandum of Understanding with the Indian Institute of Technology Madras (IIT Madras) for Phase II of the Centre for Programmable Photonic Integrated Circuits and Systems (CPPICS). Phase II is titled Silicon Photonics Enabled Cutting-edge Technology Research and Applications (SPECTRA).

Money and duration

What the program sets out to do

CPPICS Phase II is designed to move silicon photonics technologies from research towards commercially deployable products, covering photonic integrated circuit design, fabrication, characterisation, advanced packaging, testing and system integration.

It covers four application areas: high-speed optical transceivers for data centres, microwave photonics for advanced wireless communications, quantum photonics, and photonic computing for AI.

Among the planned developments

izmo Microsystems' role

A key challenge in silicon photonics is converting a fabricated photonic chip into a reliable, manufacturable optical system. CPPICS Phase II envisages a volume photonics packaging ecosystem with izmo Microsystems, covering precision assembly, photonic packaging, testing and reliability.

Under the program, izmo Microsystems' role progresses from packaging architecture and co-packaged optics (CPO) interface definition to PIC-EIC co-integration, fiber alignment and attachment, production-grade packaging, process optimisation, prototype assembly and reliability validation. The five-year roadmap targets a certified co-packaged optics design rule and service capability.

Building on Phase I

Phase II builds on the first phase of the program, which the release says achieved more than 95% of its planned milestones and generated research, IP and prototypes across programmable photonics, microwave photonics and quantum technologies. Phase II expands towards technology translation, industrialisation and commercialisation, with applications spanning data centres, telecommunications, defence, quantum technologies and advanced computing.

Management comment

Dinanath Soni, Director, izmo Microsystems Pvt. Ltd., said silicon photonics is becoming a critical technology for the next generation of AI and data-centre infrastructure as network speeds move from 400G and 800G towards 1.6T and beyond, and that converting a chip into a reliable product requires precision packaging, fiber attachment, electronic-photonic integration, thermal management and high-speed testing. He said the program brings together IIT Madras' silicon photonics research capabilities with izmo Microsystems' advanced packaging and manufacturing expertise, and that its role is to help move these technologies towards production-ready modules and co-packaged optical systems.

How to read this

This is a research-and-industrialisation collaboration with a government-sanctioned program. The outlay is a project cost funded largely by MeitY, with the company's own commitment at ₹2.40 crore in cash and in kind. The release describes intended targets and a five-year roadmap rather than confirmed orders or revenue, and it carries a caution that forward-looking statements are subject to risks and uncertainties.

More numbers
  • Total project outlay sanctioned by MeitY₹99.94 crore
  • MeitY contribution to the program₹97.54 crore
  • izmo Microsystems cash and in-kind commitment₹2.40 crore
  • Program durationfive-year
  • Planned silicon photonics transceiver engine speed1.6 Tbps
  • Microwave photonic engines operating beyond50 GHz
  • IP blocks proposed in the silicon photonics Process Design Kitmore than 100 IP blocks
  • CPPICS Phase I milestones achievedmore than 95%
Source: BSE · 7 Oct 2026

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